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SCIENTIA SINICA Informationis, Volume 51 , Issue 6 : 1030(2021) https://doi.org/10.1360/SSI-2020-0049

A gate driver circuit with the two-stage pre-charge structure for in-cell touch panels

More info
  • ReceivedMar 10, 2020
  • AcceptedJun 17, 2020
  • PublishedMay 8, 2021

Abstract


Funded by

国家自然科学基金(61774010)

深圳市科技计划(GGFW2017072816344703)


Author information










References

[1] Tomita S, Okada T, Takahashi H. An in-cell capacitive touch sensor integrated in an LTPS WSVGA TFT-LCD. Jnl Soc Info Display, 2012, 20: 441-449 CrossRef Google Scholar

[2] Tai Y T, Pearn W L, Huang K B. Capability Assessment for Weibull In-Cell Touch Panel Manufacturing Processes With Variance Change. IEEE Trans Semicond Manufact, 2014, 27: 184-191 CrossRef Google Scholar

[3] Kim H, Min B W. Pseudo Random Pulse Driven Advanced In-Cell Touch Screen Panel for Spectrum Spread Electromagnetic Interference. IEEE Sens J, 2018, 18: 3669-3676 CrossRef ADS Google Scholar

[4] Kim C, Lee D S, Kim J H, et al. Advanced in-cell touch technology for large sized liquid crystal displays. In: Proceedings of SID Symposium Digest of Technology Papers, San Jose, 2015. 895--898. Google Scholar

[5] Moon S H, Haruhisa I, Kim K. Highly Robust Integrated Gate-Driver for In-Cell Touch TFT-LCD Driven in Time Division Driving Method. J Display Technol, 2016, 12: 435-441 CrossRef ADS Google Scholar

[6] Li-Wei Chu , Po-Tsun Liu , Ming-Dou Ker . Design of Integrated Gate Driver With Threshold Voltage Drop Cancellation in Amorphous Silicon Technology for TFT-LCD Application. J Display Technol, 2011, 7: 657-664 CrossRef ADS Google Scholar

[7] Hu Z, Liao C, Li W. Integrated a-Si:H Gate Driver With Low-Level Holding TFTs Biased Under Bipolar Pulses. IEEE Trans Electron Devices, 2015, 62: 4044-4050 CrossRef ADS Google Scholar

[8] Liao C, He C, Chen T. Implementation of an a-Si:H TFT Gate Driver Using a Five-Transistor Integrated Approach. IEEE Trans Electron Devices, 2012, 59: 2142-2148 CrossRef ADS Google Scholar

[9] Zheng G T, Liu P T, Wu M C. Design of Bidirectional and Low Power Consumption Gate Driver in Amorphous Silicon Technology for TFT-LCD Application. J Display Technol, 2013, 9: 91-99 CrossRef ADS Google Scholar

[10] Liao C, Hu Z, Dai D. A Compact Bi-Direction Scannable a-Si:H TFT Gate Driver. J Display Technol, 2015, 11: 3-5 CrossRef ADS Google Scholar

[11] Lin C L, Tu C D, Wu C E. Low-Power Gate Driver Circuit for TFT-LCD Application. IEEE Trans Electron Devices, 2012, 59: 1410-1415 CrossRef ADS Google Scholar

[12] Chih-Lung Lin , Mao-Hsun Cheng , Chun-Da Tu . Low-Power a-Si:H Gate Driver Circuit With Threshold-Voltage-Shift Recovery and Synchronously Controlled Pull-Down Scheme. IEEE Trans Electron Devices, 2015, 62: 136-142 CrossRef ADS Google Scholar

[13] Chen F H, Chang C H, Tu C D, et al. Simple gate driver circuit with inserted stage for in-cell touch TFT-LCD applications. In: Proceedings of SID Symposium Digest of Technical Papers, Los Angeles, 2017. 105--107. Google Scholar

[14] Lin C L, Wu C E, Lee C E. Insertion of Simple Structure Between Gate Driver Circuits to Prevent Stress Degradation in In-Cell Touch Panel Using Multi-V Blanking Method. J Display Technol, 2016, 12: 1040-1042 CrossRef ADS Google Scholar

  • Figure 1

    A single stage of the proposed gate driver circuit

  • Figure 1

    A single stage of the proposed gate driver circuit

  • Figure 2

    The timing diagram of the proposed gate driver circuit

  • Figure 2

    The timing diagram of the proposed gate driver circuit

  • Figure 5

    5.99 in HD+ in-cell panel with the proposed gate driver circuit: (a) the system diagram; (b) driving clock signals

  • Figure 5

    5.99 in HD+ in-cell panel with the proposed gate driver circuit: (a) the system diagram; (b) driving clock signals

  • Figure 6

    (Color online) A single stage layout of the proposed circuit

  • Figure 6

    (Color online) A single stage layout of the proposed circuit

  • Figure 7

    (Color online) Timing diagram for display scanning and touch detection in 1 frame time

  • Figure 7

    (Color online) Timing diagram for display scanning and touch detection in 1 frame time

  • Figure 8

    (Color online) The key TFTs in gate driver circuits: (a) a conventional gate driver circuit [9]; (b) the proposed circuit

  • Figure 8

    (Color online) The key TFTs in gate driver circuits: (a) a conventional gate driver circuit [9]; (b) the proposed circuit

  • Figure 9

    (Color online) Effect of ${V}_{\rm~TH}$ shift of key TFT T2 on the transient response of the conventional gate driver circuit. (a) Simulated Q$_{N}$ when ${V}_{\rm~TH2}$ shifts by 0 V or +10 V; (b) simulated the G$_{N}$ when ${V}_{\rm~TH2}$ shifts by 0 V or +10 V

  • Figure 9

    (Color online) Effect of ${V}_{\rm~TH}$ shift of key TFT T2 on the transient response of the conventional gate driver circuit. (a) Simulated Q$_{N}$ when ${V}_{\rm~TH2}$ shifts by 0 V or +10 V; (b) simulated the G$_{N}$ when ${V}_{\rm~TH2}$ shifts by 0 V or +10 V

  • Figure 10

    (Color online) Effect of ${V}_{\rm~TH}$ shift of key TFT T8 on the transient response of the proposed gate driver circuit. (a) Simulated Q$_{N}$ when ${V}_{\rm~TH8}$ shifts by 0 V or +10 V; (b) simulated the G$_{N}$ when ${V}_{\rm~TH8}$ shifts by 0 V or + 10 V

  • Figure 10

    (Color online) Effect of ${V}_{\rm~TH}$ shift of key TFT T8 on the transient response of the proposed gate driver circuit. (a) Simulated Q$_{N}$ when ${V}_{\rm~TH8}$ shifts by 0 V or +10 V; (b) simulated the G$_{N}$ when ${V}_{\rm~TH8}$ shifts by 0 V or + 10 V

  • Figure 11

    (Color online) The simulated transient response from the 1st stage to the 16th stage of odd side of the proposed gate driver circuit

  • Figure 11

    (Color online) The simulated transient response from the 1st stage to the 16th stage of odd side of the proposed gate driver circuit

  • Table 1   Parameters of the proposed gate driver circuit
    Parameter Value Parameter Value
    ${W}_{\rm~T1,~T3,T7,T8,T9}$ ($\mu~\rm~m$) 250 ${W}_{\rm~T2}$ ($\mu~\rm~m$) 2500
    ${W}_{\rm~T4,~T5,~T10}$ ($\mu~\rm~m$) 100 ${W}_{\rm~T6}$ ($\mu~\rm~m$) 200
    Channel length ($\mu~\rm~m$) 3.8 ${C}_{\rm~C1}$ (pF) 1
    CK pulse width ($\mu~\rm~s$) 20 ${C}_{\rm~C2}$ (pF) 1.5
    Touch sensing period ($\mu~\rm~s$) 200 ${C}_{\rm~C3}$ (pF) 0.1
    ${V}_{\rm~H}$ (V) 17 ${V}_{\textrm~L}$ (V) $-$10
  • Table 2   Duty ratio comparison of key TFTs in the circuit
    Key TFTsStages
    ($N-1$)th (%) $N$th (%) ($N+1$)th (%)
    T2 in the conventional circuit 1.50 1.50 0.30
    T8 in the proposed circuit 0.12 1.47 0.12
    T2 in the proposed circuit 0.30 0.30 0.30
  • Table 3   Comparison of rising and falling time of G$_{N}$ and G$_{N+1}$ in the conventional circuit
    OutputsDelay time
    Rising time ($\mu~\rm~s$) Falling time ($\mu~\rm~s$)
    G$_{N}$ (${V}_{\rm~TH2}$ = 0 V) 1.72 1.41
    G$_{N}$ (${V}_{\rm~TH2}$ = +10 V) 5.33 3.11
    G$_{N+1}$ (${V}_{\rm~TH2}$ = 0 V) 1.54 1.29
  • Table 4   Comparison of rising and falling time of G$_{N}$ and G$_{N+1}$ in the proposed circuit
    OutputsDelay time
    Rising time ($\mu~\rm~s$) Falling time ($\mu~\rm~s$)
    G$_{N}$ (${V}_{\rm~TH8}$ = 0 V) 1.53 1.28
    G$_{N}$ (${V}_{\rm~TH8}$ = +10 V) 1.50 1.25
    G$_{N+1}$ (${V}_{\rm~TH8}$ = 0 V) 1.51 1.26
  • Table 5   Comparison between the proposed circuit and the reference works
    The conventional circuit [9] Reference circuit [14] The proposed circuit
    Structure 7T2C Inserted 3T1C +8T2C 10T3C
    Single stage layout area $495~\mu~\rm~m~\times~181.2~\mu~\rm~m$ N/A $625~\mu~\rm~m~\times~181.2~\mu~\rm~m$
    Control signal lines 4 6 6
    Increasing ratio of delay time newline after key TFT's V$\rm~_{TH}$ shift 10V Rising time 209.9% newline Falling time 120.6% Rising time 2.14% newline Falling time 1.31% Rising time 2.0% newline Falling time 2.4%
    Adjustable touch report rate Yes No Yes
    Duty ratio of driving TFT newline for different stages $N$th 1.5% newline ($N+1$)th 0.3% $N$th 0.3% newline ($N+1$)th 0.3% $N$th 0.3% newline ($N+1$)th 0.3%
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