浙江省自然科学基金重点项目(Z19F040002)
浙江省重点研发计划(2019C01158)
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Figure 1
(Color online) (a) Short channel effects in MOSFET; (b) planar device and FinFET
Figure 2
(Color online) Reliability with different interface capping layers
Figure 3
(Color online) Process of post-oxidation to form high-$k$/Ge interface capping layer
Figure 4
(Color online) Property comparison (with/without post-oxidation). (a) $D_{\rm~it}$; (b) mobility @ Copyright 2016 EDL
Figure 5
(Color online) Impact of interface passivation on: (a) $D_{\rm~it}$; (b) electron and hole mobility @Copyright 2013 IEDM
Figure 6
(Color online) Band alignment in Ge p- and n-MOSFET with InAlP capping layer
Figure 7
(Color online) TEM of quantum well structure of two-layer MoS$_{2}$/Ge
Figure 8
(Color online) SEM results of negative capacitance Ge CMOS FinFETs @Copyright 2017IEDM
Figure 9
(Color online) Fabrication of ultra-shallow junction combined spin-on-doping andlaser annealing techniques
Figure 10
(Color online) Comparison of junction characteristics between LA and traditional annealing techniques. protectłinebreak (a) p+/n; (b) n+/p
Figure 11
(Color online) (a) Relationship between NiGe thickness and MWA time; (b)NiGe/n-Ge Schottky junction curve fabricated by MWA, compared with othermethods
Figure 12
(Color online) (a) The $I_{\rm~D}$-$V_{\rm~D}$ curves of Ge pMOSFET fabricated by MWA,compared with traditional implantation technique; (b) parasitic resistanceof MWA NiGe under different junction depth @Copyright 2016 TED
Figure 13
(Color online) NiGe/p-Ge Schottky junction curves fabricated by DS technique withdifferent annealing conditions @Copyright 2014 EDL
Figure 14
(Color online) Schematic of GeOI device with DS S/D and $I_{\rm~D}$-$V_{\rm~G}$ curve@Copyright 2017 VLSI-TSA
Figure 15
(Color online) Ga concentration in Ge substrate with different activation methods@Copyright 2017 IEDM
Figure 16
(Color online) (a) Schematic of GeSn pTFET; (b) $I_{\rm~D}$-$V_{\rm~G}$ curves of pTFET with different Sn contents @Copyright 2014 IEDM
Figure 17
(Color online) (a) XTEM image across SiGe fin; (b) XTEM image of a single-finSiGe channel trigate PFET with $L_{\rm~G}$=18 nm. (c) $I_{\rm~D}$-$V_{\rm~G}$ of a single-fin SiGe channel trigate PFET @Copyright 2013 VLSI
Figure 18
(Color online) (a) Ge content measured by EDS and EELS for various device/finwidths; (b) mobility benchmark SiGe FinFETs (close: planar, open: FinFETs)@Copyright 2016 VLSI
Figure 19
(Color online) (a) Median short-channel $R_{\rm~on}$ for various gate stack andsplits; (b) transfer curves of the SiGe FinFET with hot I/I technique; (c)output curves @Copyright 2016 VLSI
Figure 20
TEM micrographs of cross-sections of a Ge FinFET. (a) High angleannular dark field (HAADF) image of the Ge FinFET device showing the gatestack on fin top; (b) Fin sidewall; (c) conformality is within 15%@Copyright 2012 IEDM
Figure 21
(Color online) (a) TEM micrographs of cross-sections of a InAlP capped Ge FinFET;(b) transfer characteristic curves of the Ge FinFET; (c) outputcharacteristic curves of the Ge FinFET @Copyright 2013 IEDM
Figure 22
(Color online) Ge FinFET CMOS. (a) SEM micrograph; (b) output characteristiccurves of the Ge FinFET invertor @Copyright 2015 VLSI
Figure 23
(Color online) Structure of GeOI transistor
Figure 24
(Color online) (a) $T_{\rm~GeOI}$ dependence of effective mobility of GeOI back gateMOSFETs at RT; (b) schematic diagram of scattering mechanism in GeOI@Copyright 2015 IEDM
Figure 25
(Color online) (a) Transfer curves of the DWP/smart cut GeOI pMOSFET; (b) effective mobility of the DWP GeOI pMOSFET
Figure 26
(Color online) Mobility dependence on the Ge thickness in different GeOI pMOSFETs
Figure 27
(Color online) (a) Cross-sectional TEM image of a GAA NW FET cut along the gateline; (b) the gate stack; (c) HR-TEM image shows the single crystalline GeNW with a WNW of 3.5 nm @Copyright 2013 IEDM
Si | Ge | InP | In$_{0.47}$Ga$_{0.53}$As | InAs | |
Electron mobility (cm$^2$/Vs) | 1600 | 3900 | 5400 | 14000 | 40000 |
Hole mobility (cm$^2$/Vs) | 430 | 1900 | 200 | 300 | 500 |
Bandgap (eV) | 1.1 | 0.67 | 1.34 | 0.75 | 0.36 |