SCIENCE CHINA Information Sciences, Volume 64 , Issue 6 : 160406(2021) https://doi.org/10.1007/s11432-020-3198-9

Array-level boosting method with spatial extended allocation to improve the accuracy of memristor based computing-in-memory chips

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  • ReceivedDec 31, 2020
  • AcceptedFeb 25, 2021
  • PublishedApr 21, 2021



This work was supported in part by National Key RD Program of China (Grant No. 2019YFB2205103), National Natural Science Foundation of China (Grant Nos. 92064001, 61851404, 61874169), Beijing Municipal Science and Technology Project (Grant No. Z191100007519008), and Beijing Innovation Center for Future Chips (ICFC).


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  • Figure 1

    (Color online) Array-level boosting method. (a) The architecture of ResNet-34. (b) The principles of convolutional operation with the memristor array. The convolutional kernel is flattened from ($C_{\rm~out},C_{\rm~in},K,K$) to ($C_{\rm~out},C_{\rm~in}\times~K~\times~K$) and mapped to the memristor array with differential rows. (c) The schematic of the array-level boosting method with spatial extended allocation.

  • Figure 2

    (Color online) Experimental characteristics of fabricated memristor array. (a) Structure of device and 32$\times$128 array; (b) and (c) current voltage relation and read noise of conductance when the device is programmed to eight different conductance levels; (d) the cumulative distribution and corresponding standard deviation of eight different conductance levels.

  • Figure 3

    (Color online) Array-level boosting of data representation. (a) The standard deviation of eight conductance levels under the different $N_s$; (b) the distribution of programmed images with different $N_s$.

  • Figure 4

    (Color online) Array-level boosting for the image processing application. (a) The origin discrete cosine transformation matrix; (b) the read currents of 32$\times$128 array after mapping and programming of origin discrete cosine transformation matrix; (c) the programming error matrix of (b); (d) and (e) the trajectories of related average programming error and discrete cosine transformation output root-mean-square error when the $N_s$ is changed; (f) the transition of images after discrete cosine transformation and reverse discrete cosine transformation when using different $N_s$.

  • Figure 5

    (Color online) The results of the array-level boosting method with greedy spatial extended allocation on ResNet-34.protect łinebreak (a) and (b) The simulated accuracy loss under different standard deviations of reading and writing noise, and weight precision; (c) the optimized accuracy and (d) allocated arrays when the accuracy threshold and standard deviation of noise are different; (e) the diagram of chip-in-loop emulation; (f) comparison of classification accuracy among origin software, simulation and chip-in-loop emulation.

  • Figure 6

    (Color online) Estimation of overhead with array-level boosting allocation. (a) Area usage and its breakdown; (b) power consumption and its breakdown.


    Algorithm 1 Greedy spatial extended allocation method

    Require:Neural network, dataset, accuracy threshold $A_{\rm~th}$, maximum spatial extended allocation $N_s^m$.

    Output:Spatial extended allocation of each layer: $N_s^l$.

    Calculate the accuracy of neural work without noise: ${\rm~Acc}$;

    Initialize $N_s^l,~l\in(1,L)$;

    for $l~=~1$ to $L$

    while $|{\rm~Acc}_b-{\rm~Acc}|>A_{\rm~th}$ do


    if $N_s^l>N_s^m$ then


    end if

    Calculate the accuracy with $N_s$: ${\rm~Acc}_b$;

    end while

    end for

    return $N_s^l,~l\in(1,L)$.


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