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This work was financially supported by National Key Project of Science and Technology of China (Grant Nos. 2017ZX02315001-002, 2019ZX02303).
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Figure 1
(Color online) (a) $I_{\rm~d}$-$V_{\rm~g}$ curves of n-FinFETs with (red) and without (blue) an ALD TiN capping layer. protectłinebreak (b) The $V_{\rm~th}$ shift and stress time for devices with (red) and without (blue) an ALD TiN capping layer at $125^{\circ}\mathrm{C}$ over protectłinebreak 1000 s. (c) $V_{\rm~th}$ shift of n-FinFETs with and without an ALD TiN capping layer over 1000 s. (d) The $V_{\rm~th}$ shift as a function of temperature with 1 V over-drive voltage stress at 1000 s. The energy distribution of traps in the HK layer for $V_{\rm~th}$ + 1 V at 1000 s and $125^{\circ}\mathrm{C}$. (e) EDS data for n-FinFETs without and with an ALD TiN capping layer.
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