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This work was supported in part by National Natural Science Foundation of China (Grant Nos. 2019B010145001, 616340084, 61821091, 61888102).
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Figure 1
(Color online) Simulation results of SOI DG-FeTFET at $V_{\rm~g}=0$ V and $V_{\rm~d}=0.5$ V. (a) Cross-section schematic of DG-FeTFET; (b) physical parameters for TCAD simulation; (c) single event transient drain current with respect to various LETs; (d) time variations of collected charge with various LETs; (e) bipolar amplification as function of LETs; (f) horizontal distance variations of electrostatic potential with various time for DG-FeTFET at $V_{\rm~d}=0.5$ V, at 2 nm below the lateral oxide/Si interface; (g) transient current induced by horizontal incidence; (h) transient current induced by vertical incidence; (i) collected charges for different strike positions.
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