This work was supported by National Key Research and Development Plan (Grant No. 2016YFA02- 02101); Huawei Technologies Co., Ltd., Hangzhou, China; National Natural Science Foundation of China (Grant No. 61421005); and National High-Tech R$\&$D Program (863 Program) (Grant No. 2015AA016501).
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Figure 1
Schematic structure of 64-stacked layer 3-D vertical channel TLC charge trapping NAND flash memory array in a block.
Figure 2
Vth distribution, read voltage window, and page configuration of the 3-D TLC NAND flash memory.
Figure 3
(Color online) Block page order (a) and the program sequence (b) of the 3-D VC TLC NAND flash memory.
Figure 4
Flowchart of the array program Vth distribution simulation method of 3-D TLC NAND flash memory.
Figure 5
Single memory cell programming characteristic by ISPP. The program voltage is 8–18 V, and the adopted program pulse is shown in the insert.
Figure 6
(Color online) (a) Typical Vth distribution shift of a 3-D NAND flash memory array during dumb ISPP program; (b) ISPP noise with different Vsteps.
Figure 7
(Color online) (a) WL-WL interference of 3-D VC NAND flash memory because of coupling capacitance;protect łinebreak (b) all possible cases of WL-WL interference at a single memory string in a 3-D VC NAND flash memory.
Figure 8
(Color online) Vth shift of victim cell due to WL-WL interference in correlation with the PV level of the victim cell.
Figure 9
(Color online) RTN probability density distribution of the 3-D NAND flash memory at different ambient temperatures.
Figure 10
(Color online) Simulated Vth distribution broadening at a PV level of 2.5 V.
Figure 11
(Color online) Vth distribution evolutions during ISPP PV function at Vsteps of (a) 0.2 V and (b) 1 V.
Figure 12
(Color online) (a) Effect of RTN on the program Vth distribution; (b) ISPP program Vth distribution of PV5 for both simulation and measurement, and a good agreement is obtained between the two results.
Figure 13
(Color online) Simulated Vth distributions of WL$\langle$0$\rangle$ and WL$\langle$252$\rangle$ at the memory string $\langle$0$\rangle$ of the 3-D VC TLC NAND flash memory (a) considering and (b) without considering the code-dependent coefficient.
Figure 14
(Color online) Simulated Vth distribution of one page versus measured one, and a good agreement is obtained between the two results.
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