SCIENCE CHINA Information Sciences, Volume 62 , Issue 6 : 069401(2019) https://doi.org/10.1007/s11432-017-9406-0

High-speed target tracking system based on multi-interconnection heterogeneous processor and multi-descriptor algorithm

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  • ReceivedAug 14, 2017
  • AcceptedApr 3, 2018
  • PublishedOct 24, 2018


There is no abstract available for this article.


This work was supported by National Natural Science Foundation of China (Grant Nos. 61434004, 61234003, 61504141).


Appendix A.


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  • Figure 1

    (Color online) Proposed processor architecture and tracking algorithm. (a) The whole processor architecture; (b) connection between PEs; (c) connection between RPs; (d) PE circuit; (e) RP circuit; (f) multi-descriptor tracking algorithm.