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SCIENCE CHINA Physics, Mechanics & Astronomy, Volume 60 , Issue 5 : 057301(2017) https://doi.org/10.1007/s11433-017-9019-9

Radio-frequency measurement in semiconductor quantum computation

More info
  • ReceivedJan 16, 2017
  • AcceptedMar 3, 2017
  • PublishedMar 21, 2017
PACS numbers

Abstract


Funded by

National Key Research & Development Program(2016YFA0301700)

Strategic Priority Research Program of the Chinese Academy of Sciences(XDB01030000)

National Natural Science Foundation of China(11674300,11575172,61674132,91421303)

and the Fundamental Research Fund for the Central Universities.


Acknowledgment

This work was supported by the National Key Research & Development Program (Grant No. 2016YFA0301700), the Strategic Priority Research Program of the Chinese Academy of Sciences (Grant No. XDB01030000), the National Natural Science Foundation of China (Grant Nos. 11674300, 11575172, 61674132, and 91421303), and the Fundamental Research Fund for the Central Universities.


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  • Figure 1

    (Color online) SEM image of the structure of a quantum dot sample.

  • Figure 2

    Principle of radio-frequency (RF) reflectometry charge detection. A charge detector is incorporated into a matching network to transform its impedance to a value close to the characteristic impedance of the RF lines. Then, a high-frequency signal is applied and its reflected part is measured.

  • Figure 3

    General setup for radio-frequency reflectometry.

  • Figure 4

    (Color online) (a) Schematic of the measurement setup for a radio-frequency quantum point contact (RF-QPC) including a false-color scanning electron microscopy (SEM) image of a representative device; (b) S11 of an impedance transformer with changing conductance gQPC at the resonance frequency of 220.2 MHz; (c) demodulated response Vrf measured simultaneously with direct-current conductance as the QPC gate shaded blue in the SEM image, the dashed line indicates the bias point for charge sensing, inset is the transfer function of Vrf vs. conductance; (d) amplitude modulation response of the RF-QPC to 1 MHz gate modulation, VR=0.7 mV rms, signal-to-noise ratio (SNR) of sidebands yields sensitivity Sg=5×10−6 e2/h Hz−1/2; (e) SNR of the upper sideband as a function of modulation frequency, the curve is a visual guide; (f) SNR of the upper sideband as a function of carrier power; (g) SNR of the upper sideband as a function of carrier frequency, consistent with Figure 2(c). All SNR measurements were made in a resolution bandwidth f=10 kHz. Adapted from ref. [49].

  • Figure 5

    (Color online) (a) Micrograph of the device and the schematic of its circuit; (b) amplitude S11 (blue or dark grey) and phase response (red or light grey) of the resonator; (c) illustration of the charging energy spectrum for a quantum dot (QD), the resonant radio-frequency gate voltage Vrf induces tunneling at the charge degeneracy point (green oscillation) leading to a dispersive shift that is suppressed for configurations of stable charge (orange oscillation); (d) dispersive response VDGS from the gate sensor for a few-electron double QD; (e) equivalent charge sensing signal from the QPC detector confirming the few-electron regime. The shift in location of the transitions compared with the data in (d) is caused by the required QPC gate bias. Adapted from ref. [51].

  • Figure 6

    (Color online) (a) Schematic of the cross section of a device perpendicular to the transport direction; (b) electron micrograph of an equivalent device (l=64 nm, w=30 nm) embedded in a resonant tank circuit, Cp is the parasitic capacitance to ground; (c) characterization of the reflectometry response in magnitude (top frame) and phase (bottom frame) for the OFF (Vg=0 V) and ON (Vg=1 V) states of the transistor. Adapted from ref. [52].

  • Figure 7

    (Color online) (a) Vrf around the (1,1)-(2,0) transition (32 averages), a background plane has been subtracted; (b) single-shot readout using a silent interval measurement scheme, each pixel is an average over of an integration time τint=60 μs; (c) silent interval measurement scheme in which the carrier is only unblanked during the measurement phase (blue trace), the black trace is Vrf sampled for τint=60 μs following the measurement trigger (red trace). An electrical delay between the room-temperature unblanked trigger and Vrf is observed. Adapted from ref. [49].

  • Figure 8

    (Color online) (a) Charge occupancy (left, right) of a double quantum dot detected using a RF-QPC with reflectometer voltage Vrf in continuous-sensing mode rather than single-shot readout. The triangle in (0,2) indicates where charge state (1,1) is metastable. Markers indicate gate voltages used in single-shot mode. Preparation of (0,2) singlet (P); separation for S-T0 mixing (S) and S-T+ mixing (I); measurement (M); operating point with 0-V pulse amplitude (D). (b) Two-electron energy levels as a function of detuning ε from (0,2)-(1,1) degeneracy; (c) micrograph of a device identical to the measured device, indicating Ohmic contacts (boxes), fast gate lines, reflectometry circuit, grounded contacts, and field direction; (d) pulse sequence controlled by VR and VL cycling through the points P, S, M. Sensor signal Vrf indicates the triplet (green, marked T) or singlet (blue, marked S) outcome for τS=100 ns. Integration subinterval time τM was chosen in post-processing. Adapted from ref. [19].

  • Figure 9

    (Color online) (a) Patterned top gates that define three quantum dots with QPC charge sensors on the left and right; voltages applied to gates L and R control the energy levels of the device, while voltages VLQPC and VRQPC tune QPC conductances gL and gR; (b) microwave transmission S21 of the cryogenic part of the circuit as a function of frequency measured between port 1 and 2 using a network analyzer; (c), (d) QPC pinch-off measured simultaneously in reflectometry and DC conductance; (e) reflectometry signal for the right sensor measured as a function of VL and VR showing steps corresponding to charge transitions. Electron configurations for each gate setting are indicated. Adapted from ref. [54].

  • Figure 10

    (Color online) (a) Three-channel frequency multiplexing scheme for spin qubit readout, the individual LC resonator circuits consist of a matching inductor Li, parasitic capacitance Cp, and a bias tee for independent biasing of each gate sensor; (b) micrograph of a GaAs double dot device, individual channels of the multiplexing chip are connected via bond wires to either a gate sensor (labeled (ii)) or an ohmic contact on one side of a QPC (labeled (i) and (iii)); (c) frequency response of MUX circuit separating the left RF-QPC (i), dispersive gate sensor (ii), and right RF-QPC (iii) into separate frequency channels. When a negative voltage is applied to the gates, the frequency response (shown in red) exhibits resonance as the impedance of the readout sensors approaches the characteristic impedance of the feed line. (d), (f) Frequency response of the left and right RF-QPCs as the gate voltage modulates the conductance; (e) frequency response of the dispersive gate sensor with gate bias. Note the considerable shift in resonance frequency as the gate capacitance is lowered by depletion of the electron gas beneath. Adapted from ref. [24].

  • Figure 11

    (Color online) (a) The half-wavelength reflection-line resonator is connected to two DQDs at one end of its two striplines, while the other end is used for the microwave input and output; (b) schematic diagram of the system setup; (c) a lumped circuit model of the resonator coupled to multiple DQDs; (d) the honeycomb charts of two graphene double quantum dots. Adapt from ref. [55].

  • Figure 12

    (Color online) (a) Circuit diagram of the measurement setup and SEM image of a representative InAs nanowire double quantum dot device; (b) photograph of the radio-frequency circuit board showing the sample, bias tee, and direct-current lines; (c) amplitude and phase response measured using a network analyzer with the sample held at a temperature of 35 mK; (d) normalized amplitude response, and (e) phase shift measured as a function of VR and VL; (e) ΔΦ measured along the vertical dashed line in (f) reveals the (1,1)-(1,0) charge transition with the lead as well as the (1,0)-(0,1) interdot charge transition. Adapted from ref. [59].

  • Figure 13

    (Color online) (a) Experimental setup showing a gate-defined quantum dot (QD) coupled to an impedance-matching network consisting of an inductor L (223 nH), variable capacitors CS and CM (tuned through the circuit shown in the inset), and fixed capacitor CD (87 pF). Parasitic losses in the circuit are parameterized by an effective resistance R. (b), (c) Simulation with no matching capacitance (CM=0). Voltage reflection coefficient Γ is plotted as a function of frequency for different values of sample capacitance CS as (b) magnitude, and (c) a Smith chart. The effective resistance is taken as R=20 Ω, the device resistance as 1 GΩ, and specified non-idealities of the inductor are included. The capacitance of the device is included in CS. Perfect matching occurs when Γ crosses the origin of the Smith chart (|Γ|=0). With these parameters, perfect matching is achieved only when CS=0.14 pF, which is less than the typical parasitic capacitance. (d), (e) Simulated reflection for varying CM. Perfect matching can be achieved even for a realistic large value of CS (here, CM=13.5 pF for CS=2.2 pF). In (c) and (e), gray contours on the Smith charts indicate constant real or imaginary circuit input impedance. (f), (g) Comparison of signal-to-noise ratio close to perfect matching (VS=13.5 V) and away from perfect matching (VS=9 V), with modulation applied to the gate voltage VL. (h) Conductance through the QD and (i) demodulated voltage VD measured simultaneously, with VS=13.5 V (fC=210.75 MHz). The applied power P1 of −40 dBm does not broaden the Coulomb peaks at TMC=20 mK. Adapted from ref. [64].

  • Figure 14

    (Color online) Prime-line bus and address-line bus architecture (PL-AL architecture). (a) A representative subsection of a quantum algorithm shown using quantum circuit notation. The highlighted clock cycles include single-qubit rotations (yellow), a two-qubit gate (green), and readout operation (red). Note that multiple operations are intended in a given clock cycle such that the required analog waveform for control or readout can be connected in parallel to any qubit. (b) Prime lines corresponding to a universal gate set are routed to qubits via a switch matrix controlled by the address lines. Colored paths correspond to the highlighted clock cycles in (a). Vertical dashed lines indicate the clocking of the analog prime waveforms, which occurs at a rate that is 10-100 times slower than the clocking of the address bus. The clock rate of the address bus depends on its width and qubit coherence times. Adapted from ref. [65].

  • Figure 15

    (Color online) (a) Experimental setup for measuring a double quantum dot (QD) using a cryogenic field-programmable gate array (FPGA) to steer pulses via a milliKelvin switch matrix. Charge-state readout is performed using a radio-frequency quantum point contact (QPC). The small-scale two-input-two-output switch matrix is based on high-electron mobility transistor switches, with on-chip bias tees for QD operation. (b) Device image and (c) associated circuit diagram. Adapted with permission from ref. [65]. Copyrighted by the American Physical Society.

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